Search - CPU mips

[Other] 一个台湾大学生做的MIPS CPU

Description: 一个台湾大学生做MIPS CPU的设计流程，很详细的哦，学计算机组成的同学可以看一下~
Platform: | Size: 918840 | Author: vic_357@126.com | Hits:

[Windows Develop] MIPS五级流水线模拟程序

Description: MIPS五级流水线模拟程序，能执行简单的MIPS指令，模拟流水线状态及寄存器结果，实现cpu流水的概念-MIPS five-level stream-line simulation program, this program can execute simple MIPS instruction, simulat stream-line s status and register result, and it implements stream-line of cpu.
Platform: | Size: 236544 | Author: 黄欣 | Hits:

[VHDL-FPGA-Verilog] mlite.tar

Description: Plasma IP Core 你可以利用这个组件在FPGA中设计MIPS结构的CPU -Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
Platform: | Size: 100352 | Author: xinyang | Hits:

[OS Develop] ucos2.8-run-mips

Description: UCOS在我的MIPS CPU上的移植 1. 这是UCOS在我的MIPS CPU上的移植代码, 编译工具使用标准的MIPS GCC. 2. 所有CPU相关的代码全在start.S中,相关函数说明如下: -UCOS in my MIPS CPU on one transplant. This is uCOS MIPS CPU in my code the transplant, the compiler uses the standard tools for MIPS GCC.2. All CPU-related code-wide in start.S, the correlation function as follows :
Platform: | Size: 77824 | Author: 许昕 | Hits:

[Windows Develop] MIPS

Description: MIPS模拟器,在windows环境使用,利用Linux下的可执行ELF文件模拟MIPS CPU执行汇编指令.-MIPS simulator use in windows environment, using Linux under the ELF executable file compiled simulation of the implementation of MIPS CPU instructions.
Platform: | Size: 2309120 | Author: RuanYongXiong | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程-Simple 16-bit CPU design of the VHDL code and VHDL design process cpu
Platform: | Size: 1488896 | Author: kilva | Hits:

[VHDL-FPGA-Verilog] The_design_of_MIPS_CPU(VHDL)

Description: MIPS CPU设计实例的完整文档，台湾一个大学生的MIPS CPU完整设计文档，内附设计代码。-a complete document of MIPS CPU design , a Taiwan university students complete MIPS CPU design document, containing the design code.
Platform: | Size: 918528 | Author: 李皓 | Hits:

[Embeded-SCM Develop] mips-cpu

Description: 关于嵌入式的相关资料，主要是讲mips类型的cpu，比较详细-Relevant information on the embedded mainly stresses mips types of cpu, more detailed
Platform: | Size: 287744 | Author: czmxyxbp | Hits:

[Other] cpu

Description: 基于MIPS指令集的32位CPU设计与VHDL实现-Based on the MIPS instruction set of the 32-bit CPU design and the realization of VHDL
Platform: | Size: 10553344 | Author: gy | Hits:

[ARM-PowerPC-ColdFire-MIPS] mips-iv

Description: MIPS 指令集，比see mips 更适合用作手册使用-This appendix describes the instruction set architecture (ISA) for the central processing unit (CPU) in the MIPS IV architecture. The CPU architecture defines the non-privileged instructions that execute in user mode. It does not define privileged instructions providing processor control executed by the implementation-specific System Control Processor. Instructions for the floatingpoint unit are described in Appendix B.
Platform: | Size: 632832 | Author: name | Hits:

[VHDL-FPGA-Verilog] CPU

Description: verilog编写CPU： 1. 哈佛存储器结构，大端格式； 2. 类MIPS精简指令集，支持子程序调用和软中断； 3. 实现了乘除法； 4. 五级流水线，工作频率可达80MHz（每个时钟周期一条指令，不计流水线冲突）。 -MIPS like CPU using verilog
Platform: | Size: 17408 | Author: yk | Hits:

[Embeded-SCM Develop] mips

Description: 在maxplus上实现了一个5级流水线的mips cpu，含cache-In maxplus to achieve a 5-stage pipeline of the mips cpu, with cache
Platform: | Size: 449536 | Author: tong tong | Hits:

[VHDL-FPGA-Verilog] mips

Description: MIPs CPU，VERILOG代码，经过QUARTUS综合，时序分析，验证无误。-MIPS CPU
Platform: | Size: 5120 | Author: 王龙 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 32位5级流水线CPU设计指令系统、指令格式、寻址方式、寄存器结构、数据表示方式、存储器系统、运算器、控制器和流水线结构等-32bit pipeline CPU
Platform: | Size: 187392 | Author: znl | Hits:

[VHDL-FPGA-Verilog] 32mips-cpu

Description: 基于32为MIPS指令设计的cpu，32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
Platform: | Size: 407552 | Author: 罗宾 | Hits:

[VHDL-FPGA-Verilog] F10-Single-Cycle-MIPS

Description: This a verilog code of single cycle mips-This is a verilog code of single cycle mips
Platform: | Size: 587776 | Author: hualin | Hits:

[Linux-Unix] MIPS-CPU-Overview

Description: MIPS CPU概述 MIPS CPU概述-MIPS CPU Overview MIPS CPU Overview MIPS CPU Overview
Platform: | Size: 11264 | Author: zenggang | Hits:

[VHDL-FPGA-Verilog] pipelined-mips-cpu

Description: 用verilog语言描述了MIPS的5级流水线。-Language described by verilog MIPS 5-stage pipeline.
Platform: | Size: 171008 | Author: jack chen | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 5 stage pipeline CPU, verilog HDL code-5 stage pipeline CPU
Platform: | Size: 2048 | Author: dylan | Hits:

[VHDL-FPGA-Verilog] mips

Description: mips verilog进行编写cpu,其中包括了若干的基本指令(use the verilog language to programme the CPU)
Platform: | Size: 4096 | Author: 光亮 | Hits:

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[Other] 一个台湾大学生做的MIPS CPU

[Windows Develop] MIPS五级流水线模拟程序

[VHDL-FPGA-Verilog] mlite.tar

[OS Develop] ucos2.8-run-mips

[Windows Develop] MIPS

[VHDL-FPGA-Verilog] CPU

[VHDL-FPGA-Verilog] The_design_of_MIPS_CPU(VHDL)

[Embeded-SCM Develop] mips-cpu

[Other] cpu

[ARM-PowerPC-ColdFire-MIPS] mips-iv

[VHDL-FPGA-Verilog] CPU

[Embeded-SCM Develop] mips

[VHDL-FPGA-Verilog] mips

[VHDL-FPGA-Verilog] CPU

[VHDL-FPGA-Verilog] 32mips-cpu

[VHDL-FPGA-Verilog] F10-Single-Cycle-MIPS

[Linux-Unix] MIPS-CPU-Overview

[VHDL-FPGA-Verilog] pipelined-mips-cpu

[VHDL-FPGA-Verilog] cpu

[VHDL-FPGA-Verilog] mips

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